100 MHz LVPECL clock source for high-speed serial links
The LVPECL output delivers the fast edge rates and low jitter needed for 10GbE, PCIe, and Fibre Channel reference clocks, where a standard CMOS oscillator would introduce too much phase noise. The supply voltage spans 2.25V to 3.6V, covering both 2.5V and 3.3V logic rails without an extra regulator — a single rail design simplifies the power tree and reduces BOM count.
This matters for line-powered equipment that must meet standby power limits or for battery-backed systems that need to preserve charge during idle periods.
The part is supplied on tape and reel (TR) in the 6-SMD, no-lead package (3.20mm x 2.50mm x 0.90mm), compatible with standard pick-and-place and reflow assembly. The small footprint frees board space on dense line cards and mezzanine modules.