MEMS oscillator at 100 MHz LVPECL — what it replaces
The LVPECL output at 100 MHz means the rise/fall times are fast enough for a 10 Gigabit Ethernet reference clock or a SerDes PLL reference — but the differential pair needs 50-ohm termination to VCC-2V on the board, same as any LVPECL source. Frequency stability is ±10 ppm across the full -40 to 85°C industrial range — that holds a 100 MHz clock within 1 kHz of centre frequency over temperature, enough for most precision timing applications without an external TCXO.
The 6-SMD no-lead package measures 3.20 mm x 2.50 mm with a seated height of 0.90 mm — a compact footprint that fits under a mezzanine card or alongside a dense FPGA bank.