212.5 MHz LVPECL clock source for high-speed signal chains
The DSC1102CE1-212.5000 is a MEMS-based XO delivering a 212.5 MHz LVPECL output — a common reference for SERDES, FPGA transceivers, and 10G Ethernet PHYs that require a low-jitter differential clock. Supply voltage spans 2.25V to 3.6V, so the same oscillator can be shared across a 2.5V or 3.3V clock tree without a separate regulator.
Package and footprint — 6-SMD no-lead
Housed in a 3.20 mm x 2.50 mm 6-SMD no-lead package with a seated height of 0.90 mm, the oscillator fits dense PCB layouts where height is constrained.