153.6 MHz LVPECL clock source for high-speed links
The DSC1102BI2-153.6000 is a MEMS-based XO delivering a 153.6 MHz LVPECL output — a common reference for 10 Gigabit Ethernet, Fibre Channel, and serial backplane transceivers that require a low-jitter differential clock.
Supply range and power-down control
Operates from 2.25 V to 3.6 V, covering the common 2.5 V and 3.3 V logic rails used in FPGA and ASIC clock trees.
