What this MEMS oscillator does on your board
It's the timing reference for a processor, FPGA, or serial interface that expects a clean 24.576 MHz square wave — think audio codec master clocks, USB isochronous endpoints, or Ethernet PHY reference timing. That matters when the downstream PLL multiplies the reference — a 10 ppm wander at 24.576 MHz becomes a 100 ppm jitter contribution at 245.76 MHz after a ×10 multiplication.
Supply voltage and power-down standby
The supply range is 2.25V to 3.6V, covering 2.5V and 3.3V rails without a separate regulator.
The 6-SMD, No Lead package measures 5.00 mm × 3.20 mm with a seated height of 0.90 mm — a standard ceramic oscillator footprint that mates with common 6-pad land patterns. The 0.197" × 0.126" body is the same outline as many quartz-based oscillators, so a board laid out for a generic 5.0×3.2 mm XO accepts this MEMS part without a layout change.
No NRND or EOL notice applies.