MEMS clock at 7.3728 MHz — what the stability spec means
The DSC1030CI1-007.3728T: A 7.3728 MHz XO with ±50 ppm frequency stability — that is the total variation over temperature, supply, and aging. For a UART baud-rate clock at 115200 bps, ±50 ppm keeps the bit timing error under 0.5%, well inside the 2% margin most UARTs tolerate. The oscillator starts in under 5 ms typical, which matters for a microcontroller waking from deep sleep.
Supply current and standby — power budget fit
Draws 3 mA typical during operation — low enough to share a 3V rail with a low-power MCU without a dedicated LDO. The 3V supply is fixed — not a wide-range input. The rail must stay within 3V ±10 % to guarantee the frequency stability and output swing.
Package and temperature — board-fit constraints
4-SMD no-lead package, 3.20 mm x 2.50 mm footprint, 0.90 mm seated height.