The DSC1001DL2-049.5000T delivers a 49.5 MHz clock output in CMOS logic levels, with ±25 ppm frequency stability across the full operating range.
Supply voltage range of 1.8V to 3.3V covers the common logic rails — no external level translator needed when moving between a 1.8V MCU and a 3.3V peripheral clock input. The 4-VDFN package (2.50 mm × 2.00 mm, 0.90 mm seated height) is a standard land-grid array footprint; the 0.50 mm pitch pads require a 4-layer PCB for fan-out only if the inner rows are used, but the outer rows break out cleanly on a 2-layer board for most layouts.