Active production, AEC-Q100 qualified
The 125 MHz frequency is a common reference for Gigabit Ethernet PHYs, high-speed FPGA transceivers, and MCUs with PLL-based clock trees. If your application requires ±5 ppm or better for precision timing (e.g., IEEE 1588), the DSC1001 family includes higher-stability grades.
The supply voltage range spans 1.8V to 3.3V — one oscillator covers 1.8V, 2.5V, and 3.3V logic rails without a separate regulator.
4-SMD no-lead package — board layout fit
Housed in a 4-SMD, No Lead package measuring 3.20 mm x 2.50 mm with a seated height of 0.90 mm. The land pattern is a standard 4-pad layout with a centre ground pad — the same footprint used by many quartz oscillators in the 3.2×2.5 mm form factor, so it can be a drop-in replacement for quartz XOs in that package. The no-lead package eliminates bent-lead issues during reflow and improves RF performance by reducing parasitic inductance. Standard reflow profiles for lead-free solder apply; no special baking or moisture sensitivity level (MSL) handling beyond the label on the reel.