The ATSAMD51J20A-AUT: The 120 MHz core with the FPU means a single-cycle multiply-accumulate and hardware divide, so a PID loop or an FFT bin runs without cycle-counting tricks. The 256 KB SRAM is dual-bank, which lets you ping-pong a DMA buffer for the ADC or the QSPI Flash without stalling the core. The internal oscillator trims to within 3% over temperature — adequate for UART bit rates, but if you need a USB clock within 0.25%, plan to feed the external crystal input.
The 64-TQFP (10x10 mm) has a 0.5 mm pitch — a two-layer board can route it if you keep the decoupling caps within 5 mm of each VDD pin.