8 Kbit I²C EEPROM in a compact 8-TSSOP
The Microchip AT24C08C-XHM-T is an 8 Kbit serial EEPROM with an I²C interface, organized as 1K x 8 bits.
It is ROHS3 compliant.
Write cycle timing and endurance context
For a firmware engineer scheduling I²C transactions, this means a single write command holds the bus for 5 ms before the next operation can start — plan polling or delay loops accordingly. The 1 MHz clock rate and 550 ns access time set the read throughput budget; sequential reads at 1 MHz yield ~125 KB/s raw bandwidth before protocol overhead.