1280 LEs in a 1.2V low-power MachXO2
The Lattice LCMXO2-1200ZE-1TG100C is a MachXO2-series FPGA built around 1280 logic elements arranged in 160 LABs/CLBs, with 64 Kbit of embedded block RAM and 79 user I/O brought out to a 100-TQFP package (14x14 mm). The 100-TQFP package (EIAJ standard) has a 0.5 mm pitch, which routes cleanly on a standard 4-layer PCB with via-in-pad if needed; the exposed paddle is not present on this package, so thermal relief is through the leadframe and board copper.
79 I/O and supply rail discipline
With 79 available I/O, the part suits glue-logic consolidation or a small state-machine controller where the I/O budget matches the pin count. The 1.14-1.26V core rail is narrow — a 1.2V ±3% regulator is the right choice; a 1.25V fixed regulator with 2% tolerance stays within the window. The MachXO2 family includes on-chip flash configuration memory, so no external SPI PROM is needed for power-up — the part boots from its own non-volatile block in microseconds, which simplifies the BOM and board area.
Active — sourcing and traceability
The part ships in Tray format, standard for 100-TQFP devices. Each tray holds a known quantity; the lot date-code is printed on the tray label and on the device top mark. For a BOM requiring a single date-code spread, a full-tray order minimizes code mixing.