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Lattice Semiconductor Corporation LCMXO2-1200HC-6TG100I — FPGA / CPLD & Programmable Logic

Lattice LCMXO2-1200HC-6TG100I FPGA, 1280 LUTs, 79 I/O

MPNLCMXO2-1200HC-6TG100I
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Lattice Semiconductor Corporation MachXO2 FPGA, LCMXO2-1200HC-6TG100I, 1280 logic cells, 79 I/O, 64 Kbit RAM, 100-TQFP (14x14 mm), Tray.

$15.9000Ref. price · indicative, final on quote
Packaging100-LQFP
RoHSROHS3 Compliant
SeriesMachXO2
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

LCMXO2-1200HC-6TG100I specifications
ParameterValue
SeriesMachXO2
MountingSurface Mount
Supply voltage2.375V ~ 3.465V
Operating temperature-40°C ~ 100°C (TJ)
PackageTray
Number of i (O)79
Case100-LQFP
Total RAM bits65536
Number of LABs (CLBs)160
Number of logic elements (Cells)1280

Product details

1280 LUTs in a 100-pin TQFP — logic density and board-fit

The LCMXO2-1200HC-6TG100I packs 1280 logic cells (160 LABs/CLBs) and 79 user I/O into a 100-TQFP package with a 14x14 mm body — the same footprint as a mid-range CPLD but with FPGA routing flexibility. On-chip block RAM totals 65536 bits, enough for small FIFOs, coefficient tables, or display line buffers without external memory.

ROHS3 Compliant per the manufacturer's declaration, so it passes the material-restriction check for EU-market builds without an exemption review.

Frequently asked questions

What is the difference between LCMXO2-1200HC-6TG100I and the -4TG100I speed grade?

Both share the same 100-TQFP package, 79 I/O, 1280 logic cells, and 64 Kbit RAM. The -6 suffix denotes a faster speed grade than the -4; the -5 sits between them. For a board originally laid out for the -4TG100I, the -6TG100I drops in without rewiring — same footprint, same pinout, same supply range.