The 900 mΩ ESR at room temperature sets the ripple current ceiling: at 100 kHz, the self-heating from ripple current is I² × ESR, so a 500 mA ripple component would dissipate 225 mW — well within the package's thermal budget if the ambient stays under 85°C. At the rated 6.3 V, the actual capacitance under DC bias can drop by 10-15% from the nominal value, so budget the minimum capacitance for the hold-up or decoupling requirement at the operating voltage.
Temperature range and mounting footprint
At 125°C the voltage derating curve applies; the 6.3 V rating should be derated to 2/3 of rated voltage (4.2 V) for best reliability at the high end. The 2312 (6032 Metric) package is a surface-mount chip measuring 6.00 mm × 3.20 mm with a seated height of 2.80 mm max. The pad layout follows the C-size case code per EIA-535BAAC; the anode (+) mark is on the top face. Reflow soldering profile per J-STD-020 for MSL 3 applies — a 24-hour bake at 125°C is required if the moisture-barrier bag is breached before reflow.
No direct pin-compatible second source is listed; the TAJ series is proprietary to KYOCERA AVX, but generic C-size 100 µF 6.3 V tantalum chips from other manufacturers share the same case code and can be evaluated as cross-shopped alternatives.