Intel MAX® II CPLD, EPM570T144C5N, 570 logic elements, 440 macrocells, 116 I/O, 5.4 ns tpd, 144-TQFP, 2.5V/3.3V, 0°C~85°C.
| Parameter | Value |
|---|---|
| Series | MAX® II |
| Mounting | Surface Mount |
| Programmable type | In System Programmable |
| Voltage supply - internal | 2.5V, 3.3V |
| Operating temperature | 0°C~85°C(TJ) |
| Package | Tray |
| Number of i (O) | 116 |
| Case | 144-LQFP |
| Number of macrocells | 440 |
| Delay time tpd(1) max | 5.4 ns |
| Number of logic elements (Blocks) | 570 |
The Intel EPM570T144C5N is a MAX® II CPLD — instant-on, non-volatile, in-system programmable. It packs 570 logic elements and 440 macrocells into a 144-LQFP package, with 116 user I/O brought out.
The 5.4 ns propagation delay (tpd) is the pin-to-pin combinatorial delay through one logic element. That number sets the ceiling for how fast you can run a decode or mux path.
The suffix C5N vs C4N indicates a speed grade difference. The C5N has a 5.4 ns tpd; the C4N is faster at 4.5 ns tpd. Both share the same 144-TQFP package and 570 LE density. If your timing closure is tight, the C4N buys you 0.9 ns more margin; if not, the C5N is the cost-effective choice.
The pinout is defined in the MAX II device family datasheet. The 144-TQFP package has 116 user I/O pins; the remaining pins are VCC, GND, and dedicated configuration/jtag pins. The base product number EPM570 shares the same pinout across all speed and temperature grades within the same package.
The N suffix in the order code indicates RoHS-compliant, lead-free finish. No separate RoHS certificate is needed for BOM compliance documentation.
Lead time is confirmed at quote time against an RFQ. As an active, non-obsolete part, typical lead times through independent distribution are manageable — submit an RFQ for a current lead-time estimate.