Skip to main content
Log in
Infineon Technologies S29GL256P90FFIR20 — DC-DC Power Modules

S29GL256P90FFIR20 256Mbit Parallel NOR Flash, 90 ns

MPNS29GL256P90FFIR20
End of Life

Infineon GL-P series S29GL256P90FFIR20 256Mbit parallel NOR flash, 90 ns access time, 32M x 8 organization, 3V–3.6V supply, -40°C to 85°C industrial temperature, 64-FBGA (13x11 mm) package.

$9.82Ref. price · indicative, final on quote
Infineon Technologies S29GL256P90FFIR20 datasheet (PDF)
Packaging64-LBGA
RoHSROHS3 Compliant
SeriesGL-P
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

S29GL256P90FFIR20 specifications
ParameterValue
SeriesGL-P
Memory typeNon-Volatile
MountingSurface Mount
Supply voltage3V ~ 3.6V
Memory interfaceParallel
Operating temperature-40°C ~ 85°C (TA)
PackageTray
TechnologyFLASH - NOR
Access time90 ns
Memory size256Mbit
Memory formatFLASH
Case64-LBGA
Memory organization32M x 8
Write cycle time - word, page90ns

Product details

256 Mbit parallel NOR flash for code storage and configuration

The Infineon S29GL256P90FFIR20 is a 256 Mbit parallel NOR flash memory from the GL-P series, organized as 32M x 8 bits. It delivers a 90 ns access time across the full -40°C to 85°C industrial temperature range, operating from a single 3V to 3.6V supply. The 64-FBGA (13x11 mm) package suits space-constrained designs in industrial control, telecom infrastructure, networking equipment, and automotive cabin-domain modules where reliable code shadowing or FPGA configuration storage is required.

The 90 ns access time defines the read cycle latency from address assertion to valid data on the parallel bus.

Industrial temperature grade and deployment environment

Frequently asked questions

Does S29GL256P90FFIR20 support page programming or sector erase?

Yes, as a parallel NOR flash, it supports page programming and sector erase operations typical of the GL-P family. The write cycle time is 90 ns per word or page, and the memory is organized into sectors for efficient erase granularity.

What is the exact memory organization of S29GL256P90FFIR20?

The memory is organized as 32M x 8 bits, giving a total of 256 Mbit (32 MB). The parallel interface addresses the full array with standard CE#, OE#, and WE# control signals.

Is S29GL256P90FFIR20 RoHS compliant?

Yes, the S29GL256P90FFIR20 is ROHS3 compliant, meeting the latest RoHS directive requirements for lead-free and restricted-substance materials.