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Infineon Technologies S29GL01GT10DHI010 — DC-DC Power Modules
Infineon Technologies

S29GL01GT10DHI010 1 Gbit Parallel NOR Flash, 100 ns, 64-FBGA

MPNS29GL01GT10DHI010
End of Life

Infineon GL-T series S29GL01GT10DHI010, 1 Gbit parallel NOR Flash, 100 ns access time, 2.7-3.6 V supply, 128M x 8 organization, -40 to 85°C, 64-FBGA (9x9 mm), tray.

$14.34Ref. price · indicative, final on quote
S29GL01GT10DHI010 datasheet
Packaging64-LBGA
StockContact for availability
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
  • Date & lot codes on quoteStated per line before you commit; label photos on request.
  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
  • PayPal buyer protectionPay by T/T, PayPal or Payoneer — card payments covered end to end.

Specifications

S29GL01GT10DHI010 Technical Specifications
ParameterValue
SeriesGL-T
Memory typeNon-Volatile
Mounting typeSurface Mount
Voltage2.7V ~ 3.6V
Memory interfaceParallel
Operating temperature-40°C ~ 85°C (TA)
PackageTray
TechnologyFLASH - NOR
Access time100 ns
Memory size1Gbit
Memory formatFLASH
Case64-LBGA
Memory organization128M x 8
Write cycle time - word, page60ns

Product details

1 Gbit parallel NOR Flash for code-shadowing and data-logging

The Infineon S29GL01GT10DHI010 is a 1 Gbit parallel NOR Flash memory from the GL-T series, organized as 128M x 8 bits. It delivers a 100 ns access time over a 2.7 V to 3.6 V supply rail.

100 ns access time — what it means for the bus

The 100 ns access time sets the read-cycle window the host controller must meet.

Industrial temperature range and package

Rated for -40°C to 85°C ambient, this Flash is suited for outdoor telecom cabinets, factory-floor PLCs, and under-hood automotive modules where the enclosure sees temperature swings.

Frequently asked questions

Is S29GL01GT10DHI010 compatible with 3.3V systems?

Yes. The supply voltage range is 2.7 V to 3.6 V, so it operates directly on a 3.3 V rail without external regulation or level translation for the memory interface.