256Mbit NOR Flash with SPI Quad I/O and 133 MHz clock
The S25FS256SAGMFI001 is a 256Mbit NOR Flash from Infineon's FS-S series, organised as 32M x 8 bits and accessed via a SPI Quad I/O interface that supports both standard SPI and QPI protocols. The 133 MHz clock rate yields a read throughput that can keep a Cortex-M core fed during code shadowing without wait-state bottlenecks. The 1.7V to 2V supply rail is the standout constraint: this part will not work on a 3.3V SPI bus without a level translator or a separate 1.8V rail. Design the VDD plane accordingly — the 0.3V tolerance means a clean 1.8V LDO is the practical choice.
Active production status and sourcing posture
This removes the obsolescence risk that often drives urgent BOM redesigns on NOR Flash lines. RoHS non-compliant per the listing, so verify your assembly house's exemption policy if you are running a fully RoHS-10 process. Availability is confirmed through the authorized distribution channel; we source against your BOM quantity and confirm current pricing at quote time. No stock-holding claim — quoted to order.
Package and footprint — 16-SOIC wide-body
Housed in a 16-SOIC with 0.295-inch (7.50 mm) body width, the package is a standard JEDEC wide-body SOIC. The 1.27 mm pitch is layout-friendly — two-layer boards can route the SPI signals without via congestion.