128 Mbit NOR Flash for 1.8 V core designs
The part supports both standard SPI and Quad I/O (QPI) modes, with a clock frequency of 133 MHz, so Quad-SPI reads can hit over 66 MB/s, which is enough to shadow code into RAM or boot a SoC without a wait-state penalty.
The S25FS128SAGMFV100 implements both Quad I/O SPI and QPI (Quad Peripheral Interface). In Quad I/O mode, four data lines carry address and data, quadrupling the effective throughput of a single-bit SPI bus. At 133 MHz, the raw read throughput is roughly 66 MB/s — enough to feed a Cortex-M7 or a mid-range FPGA configuration port without stalling. QPI mode further reduces command overhead by sending opcodes over the quad bus, which helps in execute-in-place (XIP) scenarios where every instruction fetch counts.
The 105°C ceiling is a step above the commercial 85°C grade, so if your enclosure is sealed or near a heat source, this part gives you the headroom without jumping to a full AEC-Q100 part.
No thermal pad to worry about — just a straightforward two-layer layout with a 0.1 µF decoupling cap near the supply pin.