512 Mbit NOR Flash for code shadowing and data logging
Quad I/O mode lets you read four data lines simultaneously, quadrupling the throughput of a standard SPI read. At 133 MHz the effective data rate is enough to feed a high-resolution display frame buffer or support execute-in-place (XIP) from a moderate-speed MCU without stalling. The 512 Mbit density (64 MB) holds a full firmware image plus an OTA staging area, config logs, and calibration tables — useful when the application processor has limited internal Flash.
Package and mounting — 24-BGA (8x6 mm)
The 24-ball BGA package (8x6 mm body) is a surface-mount footprint common on high-density memory modules. The 0.8 mm ball pitch is layout-friendly for a two-layer board if you route the Quad I/O signals carefully. The supplier device package is 24-BGA (8x6).
For dual-sourcing resilience, the FL-S family includes density and package variants that share the same SPI Quad I/O interface and command set.
