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Infineon Technologies S25FL256SDPBHB213 — Memory (DRAM / SRAM / Flash / EEPROM)

Infineon S25FL256SDPBHB213 NOR Flash, 256 Mbit, SPI Quad I/O

MPNS25FL256SDPBHB213
Active

Infineon FL-S Automotive series, FLASH - NOR, 256Mbit, SPI - Quad I/O, 66 MHz, 2.7V to 3.6V, -40°C to +105°C, 24-TBGA, Tape & Reel.

$6.1353Ref. price · indicative, final on quote
Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

S25FL256SDPBHB213 specifications
ParameterValue
SeriesAutomotive, AEC-Q100, FL-S
Memory typeNon-Volatile
MountingSurface Mount
Voltage2.7V ~ 3.6V
Frequency66 MHz
Memory interfaceSPI - Quad I/O
Operating temperature-40°C ~ 105°C (TA)
PackageTape & Reel (TR)
TechnologyFLASH - NOR
Memory size256Mbit
Memory formatFLASH
Case24-TBGA
Memory organization32M x 8

Product details

256 Mbit NOR flash for automotive code storage

The S25FL256SDPBHB213: NOR flash provides fast random-read access suitable for execute-in-place (XIP) code execution, eliminating the need to shadow code into RAM for many microcontroller boot and application storage use cases.

AEC-Q100 qualification and temperature grade

Qualified to AEC-Q100, the automotive industry's stress-test qualification standard for ICs — this part is approved for production vehicle programs requiring PPAP-level reliability documentation.

The Quad I/O interface reads four data bits per clock cycle, delivering higher throughput than standard SPI without adding dedicated address or data pins to the host controller. At 66 MHz clock frequency, the Quad I/O read throughput reaches approximately 33 MB/s (66 MHz × 4 bits), sufficient for fast code shadowing and data logging in automotive and industrial applications.

24-ball TBGA package and board integration

Housed in a 24-ball Thin BGA (TBGA) package measuring 8x6 mm (supplier device package 24-BGA (8x6)), the part fits compact designs where board area is constrained. The 0.80 mm ball pitch demands controlled impedance routing for the SPI lines at 66 MHz — keep trace lengths matched and within 50 mm of the host controller to maintain signal integrity.

Listed as Active by Infineon — no end-of-life or last-time-buy risk for ongoing production or new designs.

Frequently asked questions

What is the memory density and organization of S25FL256SDPBHB213?

It is a 256 Mbit NOR flash organized as 32M x 8 bits, accessed over a SPI Quad I/O interface at up to 66 MHz.

What package does S25FL256SDPBHB213 use?

24-ball TBGA (Thin BGA) package, 8x6 mm body, 0.80 mm ball pitch — supplier device package code 24-BGA (8x6).