256 Mbit NOR Flash, 133 MHz quad-SPI — the BOM-fit tier
The S25FL256SAGBHI203: It speaks SPI with Quad I/O at a 133 MHz clock, which gives a read throughput that keeps a Cortex-M or RISC-V core fed without stalling on code fetch. This is the density tier that fits a firmware image plus OTA staging area without overpaying for a 512 Mbit part you do not need.
Quad-SPI at 133 MHz. The 24-BGA (8x6 mm) package keeps signal inductance low.
Industrial temp, active lifecycle
This part is still being manufactured and shipped through standard distribution.
24-BGA footprint — layout notes
The 24-TBGA measures 8x6 mm with a 0.8 mm ball pitch. Standard PCB routing with 0.15 mm traces and 0.2 mm gaps fits between balls. Decouple with a 100 nF MLCC within 3 mm of the supply ball pair. No thermal pad; all dissipation goes through the supply and ground balls, so keep the via count adequate on the VSS net.