256 Mbit NOR Flash for automotive code and data storage
The SPI interface supports Quad I/O and QPI protocols, reaching a 133 MHz clock frequency for fast read-back during boot or over-the-air updates.
At 133 MHz in Quad I/O mode, the part delivers a sustained read throughput that keeps a modern Cortex-R or Cortex-M host fed without wait states. The QPI mode reduces the command overhead by using the same four I/O pins for address and data, which simplifies the host-side state machine. Verify that your host controller supports Quad SPI before specifying — if it only drives standard SPI, the part still works but at one-quarter the throughput.
For dual-sourcing, the S25FL256LAGNFM010 is a functional peer with the same density and interface but rated to 125°C — a useful alternate if your thermal budget demands the wider range.