It uses a SPI interface with Quad I/O support, which allows four data lines for read operations — a practical upgrade from standard SPI when you need faster code shadowing or execute-in-place (XIP) from flash. The 104 MHz clock frequency gives a theoretical Quad I/O read throughput of 416 Mbps, which is enough to feed a Cortex-M or similar MCU without stalling on instruction fetches.
Write performance and endurance context
Page program time is 3 ms typical, and word program time is 5 µs. These are the numbers to budget for firmware update routines — a full 128 Mbit erase and reprogram cycle will take seconds, so plan for a safe power-loss recovery mechanism in the bootloader. The FL-P series is NOR flash, which means byte-addressable random access and fast read, but slower write and erase compared to NAND. Typical use cases are code storage, configuration parameters, and small file systems where read speed and reliability matter more than raw density per dollar.