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Infineon Technologies S25FL129P0XBHIZ10 — Memory (DRAM / SRAM / Flash / EEPROM)

S25FL129P0XBHIZ10 NOR Flash, 128 Mbit, 104 MHz, Quad SPI

MPNS25FL129P0XBHIZ10
Obsolete

Cypress FL-P series, S25FL129P0XBHIZ10, 128 Mbit NOR Flash, SPI Quad I/O, 104 MHz clock, 2.7-3.6 V supply, -40 to 85°C, 24-BGA (8x6 mm), tray.

Infineon Technologies S25FL129P0XBHIZ10 datasheet (PDF)
Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

S25FL129P0XBHIZ10 specifications
ParameterValue
SeriesFL-P
Memory typeNon-Volatile
MountingSurface Mount
Voltage2.7V ~ 3.6V
Frequency104 MHz
Memory interfaceSPI - Quad I/O
Operating temperature-40°C~85°C(TA)
PackageTray
TechnologyFLASH - NOR
Memory size128Mbit
Memory formatFLASH
Case24-TBGA
Memory organization16M x 8
Write cycle time - word, page5µs, 3ms

Product details

Obsolete — what the lifecycle status means for procurement

For production builds, the only supply channel is independent distribution — surplus, new-old-stock, or broker-sourced inventory. Any lot should be date-code verified and tested for reliability before insertion, especially if the original PCN window has passed.

Quad I/O interface — bus compatibility and throughput

The SPI Quad I/O interface at 104 MHz delivers a raw read throughput of up to 52 MB/s in quad mode (four data lines at 104 MHz). This is enough to support direct code execution from the flash for many MCUs and low-end FPGAs without a separate RAM cache. The interface is backward-compatible with standard SPI, so it can drop into a legacy single-I/O bus during bring-up or fallback.

24-BGA package — footprint and rework notes

The device comes in a 24-ball BGA package measuring 8 mm x 6 mm (supplier device package 24-BGA (8x6)). The footprint is compact, so decoupling capacitance should sit within 5 mm of the supply balls to keep transient noise under 100 mV.

Frequently asked questions

Is S25FL129P0XBHIZ10 obsolete?

Yes, the lifecycle status is Obsolete. Cypress has discontinued this exact order code, and no official replacement is listed. For ongoing production, plan a qualification of a pin-compatible alternative or secure surplus stock through a broker.

What is the interface of S25FL129P0XBHIZ10?

The memory interface is SPI Quad I/O, which uses four data lines for read and write operations. It supports standard SPI, Dual SPI, and Quad SPI modes at a clock frequency of 104 MHz.

Is S25FL129P0XBHIZ10 compatible with S25FL129P0XBHIZ00?

The base product number S25FL129 is shared, and the suffix difference typically indicates packaging or temperature grade variation. Without a direct cross-reference in the record, verify pinout and electrical compatibility against the respective datasheets before substitution.