128 Mbit NOR Flash with Quad-SPI — what it brings to the board
It talks over a Quad-SPI interface at up to 133 MHz, which means the controller can read four bits per clock cycle — useful for execute-in-place (XIP) firmware or quick boot loads without tying up the main bus. The part is organized as a single 128 Mbit array, so no interleaving or bank switching is needed for most applications.
Package and footprint — what the BGA means for assembly
Housed in a 24-ball BGA (6 x 8 mm body), this part demands attention during PCB layout. The ball pitch is fine enough that a standard 0.8 mm via fanout works, but the inner rows need micro-vias or dogbone traces if the layer stack is tight. The supplier device package is marked 24-BGA (6x8) — confirm the ball-out against the datasheet before committing the footprint.