128 Mbit Automotive NOR Flash — AEC-Q100, Quad SPI, 133 MHz
It uses a SPI interface with Quad I/O and QPI support, clocked at 133 MHz, in an 8-WSON package with exposed pad. Typical applications include automotive ECU code storage, firmware shadowing, and parameter logging where the AEC-Q100 qualification is a BOM requirement.
133 MHz Quad SPI — throughput for fast boot and XIP
The 133 MHz clock rate applies to the Quad I/O mode, delivering an effective read throughput that can support execute-in-place (XIP) for many MCU cores without a separate code RAM. The QPI mode reduces the command sequence overhead by using four I/O lines for both address and data, which helps when the host controller supports it. For a design targeting a 120 MHz SPI host, this part leaves timing margin on the setup and hold windows.
If the BOM calls for 125°C operation, this part is not the fit; the FL-L family includes higher-temperature variants (check the S25FL128L datasheet for suffix options).
Package and footprint — 8-WSON with exposed pad
The pad is electrically connected to the die substrate, typically tied to ground or left floating per the datasheet recommendation. Reflow profile follows standard lead-free (Sn-Ag-Cu) profiles;
It is not on a last-time-buy or phase-out schedule.