It communicates over a SPI interface with Quad I/O support, clocked at up to 108 MHz. That clock rate, combined with the quad data lines, gives a read throughput that keeps an MCU fed during execute-in-place (XIP) boot or over-the-air update staging — the 128 Mbit density holds a substantial firmware image plus a config or log partition.
Package and mounting — 8-SOIC wide-body
Housed in an 8-SOIC wide-body package (5.30 mm body width), surface-mount soldered. The 8-pin footprint is a common NOR Flash layout shared across many 128 Mbit parts from multiple vendors, which simplifies second-sourcing or a last-minute swap.
Lifecycle status — active, no near-term LTB risk
The FL-S series is a mature, widely deployed NOR Flash family, so supply continuity through the independent channel is stable.