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Infineon Technologies IRLHS6276TRPBF

IRLHS6276TRPBF Infineon Dual N-Ch MOSFET, 20V 4.5A

MPNIRLHS6276TRPBF
End of Life

Infineon HEXFET® series, IRLHS6276TRPBF, dual N-channel MOSFET, 20V Vdss, 4.5A Id, 45mOhm Rds(on) at 4.5V, logic-level gate, 6-PQFN (2x2) package, -55°C to 150°C.

$0.68Ref. price · indicative, final on quote
Packaging6-VQFN
StockContact for availability
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
  • Date & lot codes on quoteStated per line before you commit; label photos on request.
  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
  • PayPal buyer protectionPay by T/T, PayPal or Payoneer — card payments covered end to end.

Specifications

IRLHS6276TRPBF Technical Specifications
ParameterValue
SeriesHEXFET®
FET type2 N-Channel (Dual)
Mounting typeSurface Mount
Drain to source voltage20V
Current - continuous drain (Id) @ 25°C4.5A
Power - max1.5W
Operating temperature-55°C ~ 150°C (TJ)
PackageTape & Reel (TR); Cut Tape (CT)
FET featureLogic Level Gate
Case6-VQFN
Vgs(th) (Max) @ id1.1V @ 10µA
Rds on (Max) @ id, vgs45mOhm @ 3.4A, 4.5V
Gate charge (Qg) (Max) @ vgs3.1nC @ 4.5V
Input capacitance (Ciss) (Max) @ vds310pF @ 10V

Product details

Dual N-channel logic-level MOSFET in a 2x2 PQFN

The Infineon IRLHS6276TRPBF is a dual N-channel MOSFET from the HEXFET® series, built for low-voltage load switching and DC-DC conversion where board space is tight. The logic-level gate threshold (Vgs(th) max 1.1 V at 10 µA) lets the MOSFET turn on fully from a 2.5 V or 3.3 V logic rail — no separate gate driver needed for most microcontroller or FPGA outputs.

Conduction loss and switching speed for the BOM

The 45 mOhm Rds(on) at 4.5 V gate drive sets the conduction loss floor — at 3.4 A the drop is about 150 mV per channel. Total gate charge is 3.1 nC at 4.5 V, which keeps switching losses low even at several hundred kHz; a 3.3 V GPIO sourcing a few mA can drive the gate directly. Input capacitance Ciss is 310 pF at 10 V drain bias — the gate drive sees a light capacitive load, so rise/fall times stay under 10 ns with a modest source impedance. The 1.5 W package power limit (6-PQFN, 2x2 mm) means the total dissipation across both channels must stay within that ceiling; a 4-layer board with thermal vias under the exposed pad helps pull heat into the inner planes.

Temperature range and deployment environments

The wide range also covers cold-start conditions in battery-powered equipment.

Lifecycle and sourcing

It is ROHS3 compliant.

Frequently asked questions

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