40 V, 195 A N-channel — the conduction-loss floor for high-current switching
The 240 nC total gate charge at 10 V means the gate driver must supply an average current of I = Qg × fsw — at 100 kHz switching, that is 24 mA from the driver, well within a standard totem-pole gate-drive IC but worth checking against a weak logic-output drive.
Thermal headroom and package — the D2PAK tab is the heat path
Junction temperature range is -55°C to 175°C, extending 25°C above the common 150°C ceiling. For a 380 W maximum power dissipation at the case, the thermal design must pull heat through the D2PAK exposed tab into a copper island on the PCB — the tab is the primary thermal path, not the plastic body. The 9200 pF input capacitance at 25 V drain-source means the gate-drive loop inductance matters — keep the driver close and the gate resistor physically near the FET gate lead.
