P-Channel load switch in an 8-SOIC
The P-Channel polarity means the source connects to the input rail and the drain to the load — no charge pump or level shifter needed for high-side switching.
What the 6.6 mOhm Rds(on) means for the BOM
At 16 A the conduction loss is I²R = 1.7 W, which exceeds the 2.5 W package dissipation at 25°C ambient — so the actual continuous current in a real board is derated by the ambient temperature and PCB copper area. The 92 nC total gate charge at 10 V tells the driver design: a 1 A gate driver charges the gate in about 92 ns, but a typical MCU GPIO sourcing a few mA will take microseconds, stretching the switching transition and increasing crossover loss. The 2820 pF input capacitance at 15 V Vds is the capacitive load the upstream driver sees; it sets the drive current requirement for a given rise time. The 2.4 V max threshold at 50 µA means the device is fully enhanced with 4.5 V logic-level gate drive, though the 6.6 mOhm Rds(on) is specified at 10 V.