100 V N-channel in an SOIC-8 — conduction loss and gate drive
The 18 mOhm maximum on-resistance is specified at 10 V gate drive — the design must supply a 10 V rail to achieve that Rds(on); at lower gate voltages the resistance rises significantly.
Gate charge and switching — 39 nC at 10 V
Total gate charge is 39 nC at 10 V, with an input capacitance of 1640 pF at 25 V drain-source. This is a moderate charge for a 100 V part — a standard gate driver with 1 A peak output can switch it at 50–100 kHz without excessive driver dissipation. The ±20 V maximum gate-source rating gives margin for ringing on the gate node in a hard-switched topology.
Temperature range — military-grade junction rating
The 2.5 W power dissipation at 25°C ambient is the board-level limit in still air — in a 150°C junction environment the allowable dissipation drops to near zero, so the thermal design must rely on the PCB copper to sink heat.
Lifecycle and compliance — active production, ROHS3
It is ROHS3 compliant.