The IRF7351TRPBF: The two MOSFETs share a common substrate in the 8-SO package, coupling the thermal path. Total power dissipation is 2W for the combined die. The logic-level gate threshold (Vgs(th) max of 4V at 50µA) allows drive from 5V logic. On-resistance is specified at 10V gate drive.
Switching parasitics and the 8-SO footprint
Total gate charge is 36nC at 10V. Input capacitance is 1330pF at 30V Vds. At 150°C junction, Rds(on) roughly doubles from the 25°C value — factor 1.6 to 2x into your thermal derating calculation. The 2W package limit assumes the board copper area recommended in the application note; a two-layer board with minimal copper pour will not hit that ceiling.