Gate charge and switching speed — sizing the driver
The IPT111N20NFDATMA1: Total gate charge is 87 nC at 10 V. Input capacitance is 7000 pF at 100 V drain bias.
Package and thermal path — 8-PowerSFN layout notes
The 8-PowerSFN package (PG-HSOF-8-1) is a surface-mount, exposed-pad design. The ±20 V maximum gate-source voltage means the gate driver supply rail must be regulated; a 10 V rail is the target for minimum Rds(on).
