Thermal and switching envelope
Input capacitance is 560 pF at 25 V Vds; gate charge is 17 nC at 10 V.
ROHS3 compliance is confirmed. No direct pin-compatible second source is listed in the evidence.
IPG20N06S2L50ATMA1 OptiMOS Dual N-Ch 55V 20A MOSFET
MPNIPG20N06S2L50ATMA1
End of Life
Infineon OptiMOS™ IPG20N06S2L50ATMA1, dual N-channel MOSFET, 55V Vdss, 20A continuous drain current, 50mOhm Rds(on) at 10V, logic-level gate, 51W power dissipation, PG-TDSON-8-4 package, -55°C to 175°C junction temperature.
$1.2Ref. price · indicative, final on quote
Packaging8-PowerVDFN
RoHSROHS3 Compliant
SeriesOptiMOS™
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Jul 2026
Specifications
| Parameter | Value |
|---|---|
| Series | OptiMOS™ |
| Mounting | Surface Mount |
| Drain to source voltage | 55V |
| Current - continuous drain (Id) @ 25°C | 20A |
| Power - max | 51W |
| Operating temperature | -55°C ~ 175°C (TJ) |
| Package | Tape & Reel (TR); Cut Tape (CT) |
| Technology | MOSFET (Metal Oxide) |
| FET feature | Logic Level Gate |
| Configuration | 2 N-Channel (Dual) |
| Case | 8-PowerVDFN |
| Vgs(th) (Max) @ id | 2V @ 19µA |
| Rds on (Max) @ id, vgs | 50mOhm @ 15A, 10V |
| Gate charge (Qg) (Max) @ vgs | 17nC @ 10V |
| Input capacitance (Ciss) (Max) @ vds | 560pF @ 25V |
Product details
Frequently asked questions
What is the lead time for IPG20N06S2L50ATMA1?
Lead time is quoted at the time of order request. Because this is an active, in-production part, typical lead times from Infineon are manageable, but the exact duration depends on current factory load and order quantity. Confirm with the distributor when submitting an RFQ.