IPD50N03S2L06ATMA1

Infineon Technologies · OptiMOS™ Series

Infineon OptiMOS™ IPD50N03S2L06ATMA1, N-Channel MOSFET, 30V Vdss, 50A continuous drain, 6.4mOhm Rds(on) @ 10V, AEC-Q101, PG-TO252-3-11 package, -55°C to 175°C.

Infineon Technologies IPD50N03S2L06ATMA1
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MOQ 1 · Tape & Reel (TR); Cut Tape (CT) · RoHS · EIA-481 · DAP/DDP · T/T

Technical specifications

IPD50N03S2L06ATMA1 specifications
Parameter / AttributeSpecification / Value
SeriesOptiMOS™
FET typeN-Channel
MountingSurface Mount
Drain to source voltage30 V
Drive voltage (Max rds on, min rds on)4.5V, 10V
Current - continuous drain (Id) @ 25°C50A (Tc)
Power dissipation136W (Tc)
Operating temperature-55°C ~ 175°C (TJ)
GradeAutomotive
PackageTape & Reel (TR); Cut Tape (CT)
Vgs±20V
TechnologyMOSFET (Metal Oxide)
QualificationAEC-Q101
CaseTO-252-3, DPAK (2 Leads + Tab), SC-63
Vgs(th) (Max) @ id2V @ 85µA
Rds on (Max) @ id, vgs6.4mOhm @ 50A, 10V
Gate charge (Qg) (Max) @ vgs68 nC @ 10 V
Input capacitance (Ciss) (Max) @ vds1900 pF @ 25 V

Technical details

30 V automotive-grade N-channel MOSFET in DPAK

Built on a metal-oxide semiconductor process and qualified to AEC-Q101, it is designed for automotive load switching, DC-DC converters, and motor-drive pre-drive stages where junction temperatures can reach 175°C. The on-resistance maxes at 6.4 mOhm with a 10 V gate drive, which keeps conduction losses manageable in a 50 A path — a key figure when sizing heatsinks or PCB copper for a 136 W dissipation budget. Gate charge is 68 nC at 10 V, so the driver stage should be sized to deliver that charge within the switching period without excessive cross-conduction. The part comes in a PG-TO252-3-11 (DPAK) surface-mount package with a tab for thermal transfer to the board. The 4.5 V minimum drive voltage allows logic-level gate signals, though the full Rds(on) spec is characterised at 10 V.

Input capacitance of 1900 pF at 25 V drain-source is moderate — it does not demand an aggressive gate driver but does contribute to switching losses at higher frequencies. The 68 nC gate charge at 10 V tells you the total charge the driver must source per cycle; pair it with a driver capable of sourcing that charge in the desired switching time to avoid excessive miller plateau dwell.

The PG-TO252-3-11 footprint is standard for DPAK devices, so board-level re-spin is not needed if a second-source candidate shares the same package and pinout. No official second-source alternate is listed in the Infineon cross-reference for this order code.

IPD50N03S2L06ATMA1
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