650 V SiC FET for hard-switched and resonant topologies
The IMW65R057M1HXKSA1: With a maximum Rds(on) of 74 mOhm at 16.7 A and 18 V gate drive, and a gate charge of 28 nC, this part targets high-efficiency power conversion where switching losses dominate — PFC stages, LLC converters, and bidirectional DC-DC stages on a 400 V bus. The junction temperature range extends to 175 °C, giving thermal headroom over typical 150 °C-rated silicon MOSFETs in high-ambient or high-power-density enclosures.
Conduction loss is set by the 74 mOhm maximum on-resistance at 18 V gate drive — this is the figure to use for worst-case thermal design. The 28 nC total gate charge at 18 V means the gate driver sees a moderate capacitive load. Input capacitance is 930 pF at 400 V drain bias, which sets the driver's peak current requirement and the miller plateau duration during hard switching.
