80 V, 1.1 mOhm — conduction loss floor for high-current switching
The 1.1 mOhm figure is the value the designer uses for worst-case dissipation at full load; actual Rds(on) rises with junction temperature per the normalised curve in the datasheet.
Gate charge and drive budget
Total gate charge Qg is 231 nC at 10 V. For a 100 kHz switching frequency, the gate driver must supply an average current of about 23 mA, but the peak current during the Miller plateau is what determines switching speed. The 16250 pF input capacitance at 40 V drain-source confirms this is a large-die device — the driver output stage needs enough peak current to charge and discharge that capacitance within the dead-time budget. The recommended drive voltage range is 6 V to 10 V for achieving the rated Rds(on). Using 6 V gate drive increases on-resistance above the 1.1 mOhm figure; the 10 V drive is the standard for reaching the minimum Rds(on) stated in the datasheet.
Package and thermal path
The PG-HSOF-8-1 package (8-PowerSFN) is a surface-mount power package with an exposed drain pad on the bottom. The 375 W maximum power dissipation at case temperature assumes the pad is soldered to a sufficient copper area on the PCB — the thermal resistance from junction to case is the limiting factor, not the silicon itself.
Lifecycle and compliance
The ±20 V maximum gate-source voltage is standard for this voltage class and compatible with most gate drivers.