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Infineon Technologies FM25V20A-GTR — Memory (DRAM / SRAM / Flash / EEPROM)

FM25V20A-GTR F-RAM 2Mbit SPI FRAM, 40 MHz, 8-SOIC

MPNFM25V20A-GTR
Active

Cypress F-RAM™ series, FM25V20A-GTR, 2Mbit FRAM, SPI interface, 40 MHz clock, 2V to 3.6V supply, 256K x 8 organization, -40°C to 85°C, 8-SOIC package, Tape & Reel.

$19.0400Ref. price · indicative, final on quote
Packaging8-SOIC (0.209", 5.30mm Width)
RoHSROHS3 Compliant
SeriesF-RAM™
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

FM25V20A-GTR specifications
ParameterValue
SeriesF-RAM™
Memory typeNon-Volatile
MountingSurface Mount
Supply voltage2V ~ 3.6V
Clock frequency40 MHz
Memory interfaceSPI
Operating temperature-40°C ~ 85°C (TA)
PackageTape & Reel (TR) Cut Tape (CT)
TechnologyFRAM (Ferroelectric RAM)
Memory size2Mbit
Memory formatFRAM
Case8-SOIC (0.209\", 5.30mm Width)
Memory organization256K x 8

Product details

2 Mbit FRAM with 40 MHz SPI — instant-on non-volatility

The Cypress FM25V20A-GTR is a 2 Mbit ferroelectric RAM (FRAM) in an 8-SOIC package, organized as 256K x 8 bits. It uses an SPI interface clocked up to 40 MHz and operates from 2 V to 3.6 V across the industrial temperature range of -40°C to 85°C.

What the 40 MHz SPI and 2 Mbit density mean for the BOM

The 40 MHz SPI clock reads or writes the 2 Mbit array at bus speed with no page-write wait states. The 256K x 8 organization holds roughly 256 KB of firmware parameters or telemetry.

Frequently asked questions

What is the FM25V20A-GTR equivalent or replacement?

The FM25V20A-DG is the closest functional equivalent — same 2 Mbit FRAM, same SPI interface and 40 MHz clock, same 8-SOIC package, but shipped in tube instead of tape and reel. No pin or timing differences.

Is FM25V20A-GTR RoHS compliant?

Yes, the FM25V20A-GTR is ROHS3 compliant per the manufacturer's designation.

What is the SPI interface for FM25V20A-GTR?

The FM25V20A-GTR uses a standard SPI bus clocked up to 40 MHz for read and write operations. It supports the usual SPI modes (typically mode 0 and mode 3) and includes commands for read, write, write enable, and status register access.