24 MHz ARM Cortex-M0 with integrated CapSense and analog
The CY8C4125AZI-M433: Integrates a CapSense block, a 16-channel 12-bit SAR ADC, and two IDAC outputs for touch-sensing and analog sensor interfaces.
32 KB of program Flash and 4 KB of SRAM fit firmware for CapSense tuning tables, a Modbus RTU stack, or a simple PID loop.
Active lifecycle — no near-term LTB risk
For procurement planning, this removes the urgency to stockpile or qualify a drop-in replacement for ongoing builds. The part is ROHS3 compliant, which aligns with current European and Asian regulatory requirements for new equipment.
48-TQFP package and 38 I/O — board layout considerations
Housed in a 48-TQFP (7x7 mm) with 38 general-purpose I/O, this package is a standard fine-pitch QFP that routes easily on two-layer boards. The 38 I/O count includes the CapSense pins, which need clean routing away from switching nodes to maintain touch sensitivity.
