24 MHz Cortex-M0 with integrated analog and CapSense
The CY8C4124PVI-442: It packs 16 KB flash and 4 KB SRAM into a 28-pin SSOP package — the same die as the larger CY8C4125 but with the memory trimmed to hit a lower BOM cost point for sensor-and-touch applications. What sets this part apart from a plain Cortex-M0 is the integrated CapSense block — no external capacitive-touch controller needed for up to 24 touch channels — plus a 12-bit SAR ADC (8-channel) and two current-output IDACs. The brown-out detect, POR, and LVD supervisors run autonomously, so the core can sleep through supply monitoring.
Supply flexibility and serial connectivity
Serial interfaces include I²C, SPI, UART/USART, LIN, IrDA, SmartCard, and Microwire — the SSP block handles synchronous protocols, while the UART supports LIN break generation for automotive sensor nodes. The 24 GPIOs in a 28-pin package mean only four pins are tied to power and ground; every other pin is usable as I/O or a dedicated function.