CY8C4124AXI-443

Infineon Technologies

Infineon PSoC® 4 CY8C4100 series, CY8C4124AXI-443, ARM® Cortex®-M0 32-bit MCU, 24 MHz, 16 KB Flash, 36 I/O, I²C/SPI/UART/USART, 8x12b SAR ADC, 2xIDAC, -40 to 85°C, 44-TQFP.

Infineon Technologies CY8C4124AXI-443
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[IN STOCK] In Stock: 5 pcs
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Technical specifications

CY8C4124AXI-443 specifications
Parameter / AttributeSpecification / Value
SeriesPSOC® 4 CY8C4100
Oscillator typeInternal
Program memory typeFLASH
MountingSurface Mount
Operating temperature high-40°C to 85°C (TA)
Cpu_coreARM® Cortex®-M0
Frame_size32-Bit Single-Core
Fuse_speed24 MHz
ConnectivityI²C, IrDA, LINbus, Microwire, SmartCard, SPI, SSP, UART/USART
Package_typeBulk
Number of i (O)36
StatusActive
Data convertersA/D 8x12b SAR; D/A 2xIDAC
Peripheral_typesBrown-out Detect/Reset, CapSense, LCD, LVD, POR, PWM, WDT
Supply voltage1.71

Technical details

What this PSoC 4 brings to a touch-sense or mixed-signal design

The Infineon CY8C4124AXI-443 is a PSoC 4 microcontroller from the CY8C4100 series, built around an ARM Cortex-M0 core running at 24 MHz. It packs 16 KB of Flash and integrates a 12-bit SAR ADC with eight input channels plus two current-output IDACs, which covers most capacitive-sensing and analog-front-end needs without external converters.

24 MHz Cortex-M0 — enough for real-time sense loops

At 24 MHz the Cortex-M0 delivers about 0.9 DMIPS/MHz, which is sufficient for scanning a CapSense button matrix, running a LIN or I²C sensor bus, and managing a small state machine without breaking a sweat. The 36 GPIOs in the 44-TQFP package leave room for a parallel LCD data bus and a few spare lines for expansion.

Active lifecycle — no LTB worry for new designs

The PSoC 4 family has broad second-source and cross-compatible siblings (e.g., CY8C4245LQI-483 with 48 MHz and 32 KB Flash) if a future design needs more headroom, but the CY8C4124AXI-443 itself is not at end-of-life.

44-TQFP — rework-friendly, but watch the exposed pad

The 44-pin TQFP package has a 0.8 mm pitch and an exposed thermal pad underneath. For rework, the pad needs a via-stitched ground plane to pull heat away; without it the junction temperature climbs fast under continuous ADC conversions or when driving the IDACs near their full scale. The package outline is standard, so existing QFP footprints from other PSoC 4 parts (like the 48-pin variant) can be adapted with a pad-size check.

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