Cortex-M0+ at 24 MHz — flash and RAM budget for a touch-sensor controller
The CY8C4024AXI-S412: That speed ceiling suits periodic polling loops — sensor read, CapSense scan, communication — rather than continuous DSP or high-rate control. On-chip memory: 16 KB of Flash and 2 KB of SRAM. The flash holds a modest firmware image — a CapSense library plus I²C/SPI driver fits; the SRAM leaves room for a few hundred bytes of runtime variables and a small buffer. The integrated CapSense block and 10-bit ADC (16 channels) reduce external component count for touch-interface or analog-sensor front-ends. Two 7-bit DACs provide reference or bias outputs.
Supply range and temperature — single-rail industrial deployment
This covers outdoor enclosures, unconditioned factory floors, and HVAC-adjacent panels. The 32-LQFP package (7x7 mm) is hand-solderable and routes on a two-layer board. 27 GPIO are accessible in the 32-pin package. Peripherals include I²C, SPI, UART, LIN, and IrDA — enough for sensor bus interfaces and a debug UART without external transceivers for most short-range links.
Active lifecycle — no LTB pressure for production planning
No minimum order quantity beyond the reel or tray increment.