256Kbit asynchronous SRAM in 28-SOIC wide — 25 ns access
The CY7C199D-25SXE is a 256Kbit asynchronous SRAM organised as 32K x 8, with a 25 ns access time and a 4.5V to 5.5V supply rail. The wide 28-SOIC (7.50 mm body width) footprint is the same as the industry-standard 28-pin SOIC used by many legacy 32K x 8 SRAMs, so it can drop onto an existing board layout that was routed for a 5 V asynchronous SRAM. That 125°C ceiling is the junction temperature limit — the part can sit next to a hot processor without needing an air duct.
Infineon lists the CY7C199D-25SXE as Obsolete. The 28-SOIC wide package is still widely stocked across surplus channels, but the available pool shrinks as time passes.
Design-in note: 5 V supply and 25 ns timing
The 4.5V–5.5V supply range means this SRAM is a 5 V nominal device. The 25 ns access time is specified from address valid to data valid; a 40 MHz bus with one wait state has a 50 ns cycle, which leaves 25 ns margin after the SRAM access — comfortable for most 8-bit microcontrollers but tight for a 16-bit bus with an external memory controller.