QDR II SRAM at 167 MHz — what this part does for a backplane or network buffer
The CY7C1514AV18-167BZXC is a 72 Mbit QDR II synchronous SRAM from Infineon (Cypress), organized as 2M x 36. QDR II stands for Quad Data Rate — it transfers four words per clock cycle (two reads, two writes) on separate read and write ports, eliminating the bus-turnaround dead cycles that plague conventional SRAM in high-throughput applications like network switches, telecom line cards, and high-end test equipment. The 167 MHz clock yields a peak bandwidth of 9.6 Gbit/s (167 MHz × 36 bits × 4 transfers/cycle).
Package and footprint — 165-ball FBGA, 15 mm x 17 mm
Supplied in a 165-ball FBGA (15 mm x 17 mm body), surface-mount only. The 1 mm ball pitch eases routing on a standard 4-layer PCB with via-in-pad if you want clean decoupling.
Infineon lists the CY7C1514AV18-167BZXC as Obsolete. Sourcing is through the surplus and broker channel — we can quote against an RFQ from available inventory, but date codes and quantities vary per lot. No official successor part is listed.