72Mbit QDR II SRAM — 300 MHz pipeline for high-throughput buffers
The Infineon CY7C1513JV18-300BZXC is a 72Mbit synchronous SRAM built on the QDR II architecture, organized as 4M words by 18 bits. It clocks at 300 MHz on the parallel interface, delivering back-to-back read and write operations on separate ports without bus-turnaround dead cycles — the defining advantage of QDR II over conventional synchronous SRAM. This makes it a fit for high-bandwidth data buffers in network switches, line cards, and test equipment where sustained throughput matters more than random-access latency.
Obsolete — sourcing reality for the BOM line
Infineon has marked the CY7C1513JV18-300BZXC as obsolete. No last-time-buy window or successor part number is listed in the official record. For a BOM line that requires this exact order code, the only channel is the independent surplus and broker market. We source and quote this part to order against an RFQ; availability and current pricing are confirmed at quote time. If your design can tolerate a pin-compatible alternative within the QDR II family, a cross-reference search against the base product number CY7C1513 may yield an active-density or speed-grade variant — though no official second source is recorded for this specific code.