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Infineon Technologies CY7C1512AV18-200BZC — Memory (DRAM / SRAM / Flash / EEPROM)

Infineon CY7C1512AV18-200BZC QDR II SRAM, 72Mbit, 200 MHz

MPNCY7C1512AV18-200BZC
Obsolete

Infineon CY7C1512AV18-200BZC, SRAM - Synchronous, QDR II, 72Mbit (4M x 18), 200 MHz, Parallel, 1.7V ~ 1.9V, 165-LBGA, 0°C ~ 70°C.

$110.7600Ref. price · indicative, final on quote
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

CY7C1512AV18-200BZC specifications
ParameterValue
Memory typeVolatile
MountingSurface Mount
Supply voltage1.7V ~ 1.9V
Clock frequency200 MHz
Memory interfaceParallel
Operating temperature0°C ~ 70°C (TA)
PackageTray
TechnologySRAM - Synchronous, QDR II
Memory size72Mbit
Memory formatSRAM
Case165-LBGA
Memory organization4M x 18

Product details

It runs at a 200 MHz clock frequency, delivering back-to-back read and write operations on separate data ports without bus-turnaround dead cycles. The 1.7 V to 1.9 V core supply and 165-ball FBGA package (15x17 mm) target high-throughput networking, telecom line cards, and test equipment where a narrow, deep memory buffer is needed.

Obsolete — sourcing reality for the BOM line

The CY7C1512AV18-200BZC is officially obsolete per the manufacturer's lifecycle status. There is no listed direct successor from Infineon for this exact density and speed grade. If a production program needs a long-term supply, a QDR II+ or QDR IV part with a compatible interface and density should be evaluated for a board respin.

Package and footprint — 165-FBGA (15x17 mm)

The part comes in a 165-ball FBGA, 15x17 mm body. The shipping medium is tray, not tape-and-reel.

Frequently asked questions

What is the package type for CY7C1512AV18-200BZC?

The package is a 165-ball FBGA (15x17 mm), shipped in tray format. The supplier device package code is 165-FBGA (15x17).

What is the memory technology and organization of this part?

It is a synchronous QDR II SRAM, volatile memory, organized as 4M x 18 bits for a total of 72 Mbit. The memory interface is parallel.