72 Mbit NoBL synchronous SRAM — 3.4 ns access, 167 MHz clock
At 167 MHz the clock period is about 6 ns, so the SRAM leaves roughly 2.6 ns for board trace delay, setup time at the controller, and clock skew. That is tight — expect to use controlled-impedance traces and keep the stub length under 1 inch. The NoBL feature eliminates the turnaround cycle when switching from read to write, which keeps the bus fully utilised in burst transactions.
The CY7C1472V33-167AXIT is listed as obsolete. Infineon no longer manufactures it, and no factory orders can be placed. The only available stock is held by independent distributors and brokers who acquired it during the last-time-buy window or from excess inventory.
100-TQFP footprint — hand-solderable with care
The 100-pin TQFP (14x20 mm body) has a 0.5 mm pitch. It is hand-solderable with a fine conical tip and flux, but the tight pitch means bridging is easy — use a stencil for production reflow. The exposed pad (if present) is not a thermal pad on this package; all dissipation goes through the leads. MSL 3 out of the bag: bake at 125°C for 8 hours if the moisture-barrier bag has been open longer than the floor-life window.