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Infineon Technologies CY7C1471V33-133AXC — Memory (DRAM / SRAM / Flash / EEPROM)

Cypress CY7C1471V33-133AXC 72Mbit NoBL SRAM, 133 MHz

MPNCY7C1471V33-133AXC
Last Buy

Cypress CY7C1471V33-133AXC, NoBL™ synchronous SRAM, 72Mbit (2M x 36), 133 MHz clock, 6.5 ns access time, 3.135V–3.6V supply, 100-LQFP, 0°C to 70°C.

$128.6129Ref. price · indicative, final on quote
StockContact for availability
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
  • Date & lot codes on quoteStated per line before you commit; label photos on request.
  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
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Specifications

CY7C1471V33-133AXC Technical Specifications
ParameterValue
SeriesNoBL™
Memory typeVolatile
Mounting typeSurface Mount
Voltage3.135V ~ 3.6V
Frequency133 MHz
Memory interfaceParallel
Operating temperature0°C ~ 70°C (TA)
PackageTray
TechnologySRAM - Synchronous, SDR
Access time6.5 ns
Memory size72Mbit
Memory formatSRAM
Case100-LQFP
Memory organization2M x 36

Product details

What this SRAM is and where it fits

The Cypress CY7C1471V33-133AXC is a 72 Mbit synchronous SRAM organized as 2M x 36, built on the NoBL™ (No Bus Latency) architecture. It clocks at 133 MHz with a 6.5 ns access time, operating from a 3.135 V to 3.6 V supply. The part comes in a 100-lead LQFP (14x20 mm body) and is rated for the commercial temperature range of 0°C to 70°C. This is a high-throughput memory for networking equipment, telecom line cards, and high-end test instrumentation where back-to-back read-write cycles without dead cycles matter.

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Frequently asked questions

What is the closest pin-compatible alternative to CY7C1471V33-133AXC?

No official second-source or pin-compatible alternate is listed in the available records. The 100-LQFP footprint and 72 Mbit density narrow the field; any replacement would need to match the 133 MHz clock, 6.5 ns access, and 3.3 V supply. We recommend checking the Cypress NoBL family for a direct-sibling order code with the same package and timing.

What does the NoBL™ series mean for this SRAM?

NoBL stands for No Bus Latency — the architecture eliminates the dead cycle normally required when switching from read to write. This lets the memory sustain back-to-back transactions at the full 133 MHz clock rate, which is critical for high-throughput applications like network packet buffers.