36Mbit NoBL™ synchronous SRAM — 167 MHz, 3.4 ns access
It clocks at 167 MHz with a 3.4 ns access time, meaning the pipeline delivers a new data word every clock cycle with zero dead cycles between read and write — critical for high-throughput packet buffers, DSP scratchpads, and FPGA co-processor memory where back-to-back transactions must not stall the bus. The supply range is 2.375V to 2.625V, so it runs on a 2.5V rail, not 3.3V or 1.8V; mismatching that burns the part. Packaged in a 100-TQFP (14x20 mm), it's a QFP — field-swappable with a soldering iron or hot-air station, no BGA rework needed.
This part is listed as Obsolete by Cypress (now Infineon). For existing BOM lines, the only supply channel is the independent market — surplus stock, new-old-stock, or broker inventory.
The 2.375V–2.625V supply range ties this part to a 2.5V rail. If your board already has a 2.5V regulator (common for DDR memory or low-power FPGAs), it fits. The 100-TQFP package is 14x20 mm with a 0.5 mm pitch; the footprint is standard for 100-pin QFPs, but double-check the pinout against your layout because Cypress NoBL™ parts have a specific pin assignment that differs from some asynchronous SRAMs.