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Infineon Technologies CY7C146-55JXC — Memory (DRAM / SRAM / Flash / EEPROM)

Infineon CY7C146-55JXC 16Kbit Dual-Port SRAM, 55 ns, PLCC-52

MPNCY7C146-55JXC
Obsolete

Infineon CY7C146-55JXC, SRAM - Dual Port, Asynchronous, 16Kbit (2K x 8), 55 ns, Parallel, 4.5V ~ 5.5V, 0°C ~ 70°C, 52-PLCC (19.13x19.13), Tube.

Infineon Technologies CY7C146-55JXC datasheet (PDF)
Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

CY7C146-55JXC specifications
ParameterValue
Memory typeVolatile
MountingSurface Mount
Voltage4.5V ~ 5.5V
Memory interfaceParallel
Operating temperature0°C ~ 70°C (TA)
PackageTube
TechnologySRAM - Dual Port, Asynchronous
Access time55 ns
Memory size16Kbit
Memory formatSRAM
Case52-LCC (J-Lead)
Memory organization2K x 8
Write cycle time - word, page55ns

Product details

16Kbit dual-port asynchronous SRAM in a PLCC-52 footprint

The Infineon CY7C146-55JXC is a 16Kbit dual-port asynchronous SRAM organized as 2K x 8 bits, housed in a 52-lead PLCC package (J-lead, surface-mount). It provides two independent ports with separate address, data, and control lines, allowing simultaneous read or write access from two bus masters. The 55 ns access time and matched write-cycle time define the bus timing for systems that share memory between processors, DSPs, or controllers without arbitration logic overhead.

55 ns access time and dual-port arbitration

Dual-port architecture means two independent buses can access any memory location simultaneously — the internal arbitration handles same-address contention via the BUSY flag. This part is used in shared-memory designs like multiprocessor mailboxes, video frame buffers, or network packet buffers where separate controllers need a common scratchpad.

Infineon (formerly Cypress) lists the CY7C146-55JXC as obsolete. Given the obsolete status, verify date-code consistency and lot traceability when procuring from non-franchised sources; the PLCC package and J-lead form factor are distinctive and the laser etch should match Infineon/Cypress marking standards for that fab period.

Frequently asked questions

What is the replacement for CY7C146-55JXC?

No official replacement part number is provided in the lifecycle record. For a pin-compatible alternative within the Cypress/Infineon dual-port SRAM family, consider the CY7C144 series (which offers similar 2K x 8 organization and 55 ns speed in a PLCC-52 package) — however, verify the exact pinout and control-logic compatibility against your board's schematic before substitution.

Can I use CY7C146-55JXC in a new design?

Not recommended. The part is obsolete, meaning no new production runs are planned. A new design would face supply risk and eventual unavailability. Look at current dual-port SRAMs from Infineon or Renesas in the same density and package class, or consider a single-port SRAM with external arbitration if dual-port is not strictly required.